1. Field of the Invention
The present invention relates to a wafer-level chip-scale package of an image sensor and a method of manufacturing the same. In the method, a glass is attached in a wafer level stage such that metal bumps are formed as external connection terminals. After the wafer is thinned, long via holes are formed by dry etching and are filled with metal. Therefore, conventional solder balls can be omitted. Accordingly, it is possible to shorten the manufacturing process, enhance the mass-production capability and minimize the defects due to foreign substances.
2. Description of the Related Art
One of the main trends of semiconductor industries is miniaturization of semiconductor devices. The demand for the miniaturization is stronger in a semiconductor chip package industry. The package is formed by sealing an integrated circuit (IC) chip using plastic or ceramic resin so that the IC chip can be installed in an actual electronic device.
A conventional typical package is much large than an IC chip installed therein. Accordingly, package engineers have attempted to reduce a package size to about a chip size.
Owing to the above attempts, a chip-scale package (CSP) and a wafer-level chip-scale package (WLCSP) have been recently developed. The chip-scale package is also call “chip-size package”. In a conventional package manufacturing method, package assembly is performed on a separate package basis. On the other hand, in the WLCSP method, a plurality of packages are simultaneously assembled and manufactured in a wafer level.
Development of semiconductor IC chips has contributed to development of package technologies, leading to the high-density, high-speed, miniaturization and slimness of the package. The structure of a package device has evolved from a pin insert type or a through hole mount type to a surface mount type, thereby increasing the mount density for a circuit board. Recently, researches are actively conducted on a chip-size package that can reduce a package size to about a chip size while maintaining bare chip characteristics in a package state.
A WLCSP is one of chip-size packages. In the WLCSP, chip pads are rerouted or redistributed on a chip surface and then solder balls are formed. In the WLCSP, a chip or a die is directly mounted on a circuit board by using a flip-chip method, and solder balls formed on the redistributed circuit of the chip are bonded to conductive pads of the circuit board. At this point, solder balls are also formed on the conductive pads and are thus bonded to the solder balls of the package.
Recently, there have been introduced a variety of CSP technologies that can reduce a package size to about a semiconductor chip size. These technologies are rapidly spread thanks to the miniaturization and high-integration of semiconductor devices.
A wafer-level package (WLP) technology is esteemed as the next-generation CSP technology. In the WLP technology, the entire assembly process is completed in a wafer level where chips are not diced. In the WLP technology, a series of assembly processes, such as die bonding, wire bonding, and molding, are completed in a wafer state where a plurality of chips are connected to one another, and then the resulting structure is diced to manufacture the complete products.
Therefore, compared to the CSP technology, the WLP technology can further reduce the total package costs.
In general, solder balls are formed on an active side of a semiconductor chip in the WLCSP. This structure makes it difficult to stack the WLCSP or to apply the WLCSP to manufacture of a sensor package such as a charge coupled device (CCD).
A conventional packaged IC device, which includes an image sensor package manufactured using the WLCSP technology, is disclosed in Korean Patent Publication No. 2002-74158. The structure of the conventional packaged IC device will be briefly described with reference to FIG. 1.
FIG. 1 illustrates a conventional crystal substrate device with an internal cavity.
Referring to FIG. 1, a microlens array 100 is formed on the top surface of a crystal substrate 102. A package layer 106, which is generally formed of glass, is hermetically attached onto the bottom surface of the crystal substrate 102 by an epoxy 104. An electrical contact 108 is formed along each edge of the package layer 106. A solder ball bump 110 is formed on the bottom surface of the package layer 106, and a conductive pad 112 is formed on the top surface of the crystal substrate 102. The electrical contact 108 is connected to the solder ball bump 110 and is electrically connected to the conductive pad 112.
A package layer 114, which is generally formed of glass, and an associated spacer member 116 are hermetically attached onto the top of the crystal substrate 102 by an adhesive such as an epoxy 108 such that a cavity 120 is formed between the microlens array 100 and the package layer 114.
The electrical contact 108 is formed, for example by plating, on the slant surfaces of the epoxy 104 and the package layer 106.
Because the conductive pad 112 and the electrical contact 108 face and contact each other, the conventional IC is low in connection reliability. Also, because the conventional IC is manufactured by stacking a plurality of components, the structure thereof becomes complex, and the manufacturing process becomes complicated.
Conventional semiconductor devices with a high-reliability ball grid array (BGA) formed using the SLCSP technology are disclosed in International Patent Publication No. WO 99/040624, Korean Patent Publication No. 2000-2962, and Korean Patent Publication No. 2002-49940. In the conventional semiconductor devices, a solder bump is formed to have a solder ball electrically connected to a pad electrode. Many processes are required to manufacture the solder ball, and the processes are complex. This degrades the mass-production capability and the production of the devices.
Moreover, the conventional WLCSP should have such a structure that a plurality of solder balls are formed to protrude from the bottom of the WLCSP. Therefore, the side or bottom surface of the package cannot be directly attached onto a separate PCB or ceramic substrate during a hot bar process performed for manufacturing a socket-type camera module, and thus a separate contact must be interposed therebetween for electrical connection of the package.